As semiconductor device geometries continue to shrink, dielectric layers such as those used to form gate dielectrics in MOSFET transistors need to become thinner to maintain transistor operating characteristics. FIG. 1 shows a p-type MOSFET transistor 10 having a thin gate dielectric 18. Gate dielectric 18 may, for example, comprise a thin layer of thermally grown silicon dioxide. Alternatively, for lower defect density, a composite of a thermally grown silicon dioxide with an overlying LPCVD silicon dioxide may be used. Gate dielectric 18 separates gate electrode 20 from the channel region 16. Gate electrode 20 typically comprises polysilicon doped for lower resistance. For a p-type MOSFET, boron is typically used to dope the gate electrode 20 and source/drain regions 14. However, due to the thinness of gate dielectric 18, during processing, boron from gate electrode 20 penetrates through the gate dielectric 18 into the channel region 16. Boron penetration into the channel impairs the performance of the transistor by degrading threshold voltage control, increasing off-state current leakage and decreasing reliability.
Several structures have been developed to stop boron penetration into the channel region. In one structure, the gate dielectric 18 is formed by thermally growing a silicon dioxide in a N.sub.2 O ambient to create an oxynitride. In another structure, the gate dielectric 18 formed by depositing a nitrogen-doped oxide. Both structures use nitrogen at the gate dielectric/silicon interface to stop the boron penetration. Unfortunately, the nitrogen levels required in the gate dielectric 18 to stop boron penetration degrade transistor carrier mobility. The nitrogen acts as a coulombic charge scattering center on the channel carriers, reducing their mobility. Thus, in determining the concentration of nitrogen to include in gate dielectric 18, there is a trade-off between blocking the boron penetration and maintaining high channel conductance.